Hi, I’m Roberto Ibáñez Mingarro

Embedded Systems Engineer focused on architecture-driven design, low-level firmware, and validation-oriented hardware development.

I design and implement embedded systems with architectural intent — integrating hardware, firmware, and digital logic into coherent, measurable platforms.

This portfolio presents complete project documentation as produced during development: system architecture, PCB design decisions, timing analysis, simulations, validation measurements, and experimental results. Nothing is reduced to summaries; engineering reasoning remains explicit.

Full-Stack Embedded Systems Engineer

I operate across the full hardware stack — from KiCad-based PCB design and power domain structuring to register-level firmware on STM32 and ESP32 platforms, and structured VHDL development for FPGA-based systems.

Electrical constraints, signal integrity, interrupt latency, clock domains, and digital timing are treated as primary design variables. Architectural decisions are validated through instrumentation, simulation (MATLAB / Python), and controlled measurement workflows.

The result is deterministic, resource-efficient, and experimentally verified embedded systems.

Engineered as unified architectures, not assembled subsystems.

ENGINEERING PROJECTS

MP4 PLAYER REVERSE ENGINEERING

Hardware architecture reconstruction · PCB layer-stack inference · CAD-level schematic reconstitution

AUTONOMOUS SAILBOAT CONTROL SYSTEM (STM32)

Register-level driver stack · Deterministic interrupt-driven control · Sensor/actuator integration (PWM, ADC, SPI/I2C, UART/XBee)

DIGITAL WATTMETER PCB DESIGN (STM32 + KICAD)

Precision analog front-end · STM32 ADC acquisition + real-time power computation · Signal-integrity disciplined layout & bring-up

8-bit pipelined RISC CPU project thumbnail

8-BIT PIPELINED RISC CPU (VHDL + FPGA)

Five-stage pipeline · hazard-aware control · synthesis → P&R validation on Artix-7

Motor-generator identification and PI control project thumbnail

MOTOR–GENERATOR SYSTEM IDENTIFICATION AND PI CONTROL

Experimental identification campaign and PI regulation validation on real hardware.

FULL-CUSTOM CMOS COUNTER

Transistor-level 3-bit synchronous counter at 0.65 V with post-layout validation.

ENGINEERING TRACK

A short, evidence-driven snapshot of my academic path and the constraints that shaped how I work.

INSA Toulouse campus — GEI – INSA Toulouse (France) × ESTCE – Universitat Jaume I (Spain)

Double degree: UJI × INSA Toulouse

I’m pursuing a double degree between Universitat Jaume I (Spain) and INSA Toulouse (France), specialised in Embedded Systems. My work spans hardware design, low-level firmware, and RTL logic, with engineering-grade documentation as a core deliverable.

Path: Industrial Technologies Engineering (UJI) + Electronics & Automation Engineering (INSA)
Focus: Embedded architectures, deterministic firmware, verification-driven design
Deliverables: Architecture, diagrams, validation results, and full project traceability

Adaptation under constraints

Moving to France to study engineering without knowing the language forced fast adaptation: new academic system, new culture, and a heavy technical workload. I treated it like an engineering problem: break down, iterate, measure progress, and execute consistently.

Constraint: technical courses in a new language
Method: structured learning loops + repeatable study systems
Outcome: maintained performance while building a strong project portfolio

Embedded systems laboratory work — hardware validation & instrumentation

Performance & signal

I’m part of an academic excellence track (ARA). Beyond grades, my main “signal” is execution: I ship complete, documented systems — not just partial demos — and keep the engineering reasoning explicit.

What I optimize

Determinism, traceability, validation, and clean architecture boundaries.

What you’ll see

Full project documentation: decisions, diagrams, calculations, tests, and results.

TECHNICAL ENVIRONMENT & TOOLCHAIN

Electronic design and simulation environment

Electronic Design & Simulation

I use schematic capture and simulation tools as engineering decision environments — not drawing utilities. Circuit topology, filtering strategies, reference schemes, and signal behavior are validated before layout execution.

Tools integrated into workflow: KiCad • LTSpice • Proteus
Expansion: Currently expanding into Altium Designer

Embedded platforms and firmware execution

Embedded Platforms & Firmware Execution

Firmware is developed with architectural intent. Peripheral configuration at register level, interrupt-driven execution, deterministic timing behavior, and resource-bound optimization define my implementation approach.

Platforms: STM32 • ESP32 • FPGAs (Basys 3) • Bare-metal C development

Engineering computation and modeling workflows

Engineering Computation & Modeling

Numerical modeling and simulation are used to validate system hypotheses before hardware deployment. Control systems, filtering behavior, and signal processing workflows are analyzed and verified using computational tools.

Tools: MATLAB • Simulink • Python

Mechanical & System Integration

Mechanical design is treated as part of system architecture. Enclosure constraints, structural considerations, and electro-mechanical compatibility are integrated early in the development cycle.

Tool: SolidWorks • AutoCAD • ANSYS